Initial commit. Cycle-accurate 6502 emulator.
This commit is contained in:
Andrea Orrù
parent
21ca933bdb
commit
edc66c26dd
1
.gitignore
vendored
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.gitignore
vendored
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.sconsign.dblite
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5
SConstruct
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SConstruct
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env = Environment(CXX = 'clang++',
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CXXFLAGS = '-std=c++1y -stdlib=libc++',
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LIBS = 'c++abi')
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env.Program('laines', Glob('src/*.cpp'))
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198
src/cpu.cpp
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src/cpu.cpp
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#include <cstdio>
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#include <cstdlib>
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#include "cpu.hpp"
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u8 mem[0x10000];
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u8 A, X, Y, S;
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u16 PC;
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Flags P;
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u64 clock;
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#define T clock++
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inline bool cross(u16 a, u8 i) { return ((a+i) & 0xFF00) != ((a & 0xFF00)); }
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inline void upd_cv(u8 x, u8 y, s16 r) { P.c = (r>0xFF); P.v = ~(x^y) & (x^r) & 0x80; }
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inline void upd_nz(u8 x) { P.n = x & 0x80; P.z = (x == 0); }
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inline u8 wr(u16 a, u8 v) { T; return mem[a] = v; }
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inline u8 rd(u16 a) { T; return mem[a]; }
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inline u16 rd16_d(u16 a, u16 b) { return rd(a) | (rd(b) << 8); }
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inline u16 rd16(u16 a) { return rd16_d(a, a+1); }
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inline u8 push(u8 v) { return wr(0x100 | (S--), v); }
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inline u8 pop() { return rd(0x100 | (++S)); }
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inline u16 imm() { return PC++; }
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inline u16 imm16() { PC += 2; return PC - 2; }
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inline u16 abs() { return rd16(imm16()); }
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inline u16 _abx() { T; return abs() + X; }
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inline u16 abx() { u16 a = abs(); if (cross(a, X)) { T; }; return a + X; }
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inline u16 aby() { u16 a = abs(); if (cross(a, Y)) { T; }; return a + Y; }
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inline u16 zp() { return rd(imm()); }
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inline u16 zpx() { T; return (zp() + X) % 0x100; }
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inline u16 zpy() { T; return (zp() + Y) % 0x100; }
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inline u16 izx() { u8 i = zpx(); return rd16_d(i, (i+1) % 0x100); }
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inline u16 _izy() { u8 i = zp(); return rd16_d(i, (i+1) % 0x100) + Y; }
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inline u16 izy() { u16 a = _izy(); if (cross(a-Y, Y)) { T; }; return a; }
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template<u8& r, Mode m> void st() { wr( m() , r); }
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template<> void st<A,izy>() { wr(_izy() , A); T; }
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template<> void st<A,abx>() { wr( abs() + X, A); T; }
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template<> void st<A,aby>() { wr( abs() + Y, A); T; }
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#define G u16 a = m(); u8 p = rd(a)
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template<u8& r, Mode m> void ld() { G; upd_nz(r = p); }
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template<u8& r, Mode m> void cmp() { G; upd_nz(r - p); P.c = (r >= p); }
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template<Mode m> void ADC() { G ; s16 r = A + p + P.c; upd_cv(A, p, r); upd_nz(A = r); }
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template<Mode m> void SBC() { G ^ 0xFF; s16 r = A + p + P.c; upd_cv(A, p, r); upd_nz(A = r); }
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template<Mode m> void BIT() { G; P.z = !(A & p); P.n = p & 0x80; P.v = p & 0x40; }
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template<Mode m> void AND() { G; upd_nz(A &= p); }
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template<Mode m> void EOR() { G; upd_nz(A ^= p); }
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template<Mode m> void ORA() { G; upd_nz(A |= p); }
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template<Mode m> void ASL() { G; P.c = p & 0x80; upd_nz(wr(a, p << 1)); T; }
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template<Mode m> void LSR() { G; P.c = p & 0x01; upd_nz(wr(a, p >> 1)); T; }
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template<Mode m> void ROL() { G; u8 c = P.c ; P.c = p & 0x80; upd_nz(wr(a, (p << 1) | c) ); T; }
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template<Mode m> void ROR() { G; u8 c = P.c << 7; P.c = p & 0x01; upd_nz(wr(a, c | (p >> 1)) ); T; }
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template<Mode m> void DEC() { G; upd_nz(wr(a, --p)); T; }
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template<Mode m> void INC() { G; upd_nz(wr(a, ++p)); T; }
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#undef G
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template<u8& r> void dec() { upd_nz(--r); T; }
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template<u8& r> void inc() { upd_nz(++r); T; }
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void ASL_A() { P.c = A & 0x80; upd_nz(A <<= 1); T; }
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void LSR_A() { P.c = A & 0x01; upd_nz(A >>= 1); T; }
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void ROL_A() { u8 c = P.c ; P.c = A & 0x80; upd_nz(A = ((A << 1) | c) ); T; }
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void ROR_A() { u8 c = P.c << 7; P.c = A & 0x01; upd_nz(A = (c | (A >> 1)) ); T; }
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template<u8& s, u8& d> void tr() { upd_nz(d = s); T; }
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template<> void tr<X,S>() { S = X; T; }
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void PLP() { P.reg = (pop() & 0b11001111) | (P.reg & 0b00110000); T; T; }
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void PHP() { push(P.reg | (1 << 4)); T; }
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void PLA() { A = pop(); upd_nz(A); T; T; }
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void PHA() { push(A); T; }
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void NOP() { T; }
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void BRK() { exit(0); }
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void RTI() { PLP(); PC = pop() | (pop() << 8); }
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void RTS() { PC = (pop() | (pop() << 8)) + 1; T; T; T; }
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template<u8 f, bool v> void flag() { P.set(f, v); T; }
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template<u8 f, bool v> void br() { s8 j = rd(imm()); if (P.get(f) == v) { PC += j; T; } }
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void JMP_IND() { u16 i = rd16(imm16()); PC = rd16_d(i, (i&0xFF00) | ((i+1) % 0x100)); }
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void JMP() { PC = rd16(imm16()); }
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void JSR() { u16 t = PC+1; T; push(t >> 8); push(t); PC = rd16(imm16()); }
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void step()
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{
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switch (rd(PC++))
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{
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case 0x00: return BRK() ; case 0x01: return ORA<izx>() ;
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case 0x05: return ORA<zp>() ; case 0x06: return ASL<zp>() ;
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case 0x08: return PHP() ; case 0x09: return ORA<imm>() ;
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case 0x0A: return ASL_A() ; case 0x0D: return ORA<abs>() ;
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case 0x0E: return ASL<abs>() ; case 0x10: return br<N,0>() ;
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case 0x11: return ORA<izy>() ; case 0x15: return ORA<zpx>() ;
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case 0x16: return ASL<zpx>() ; case 0x18: return flag<C,0>() ;
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case 0x19: return ORA<aby>() ; case 0x1D: return ORA<abx>() ;
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case 0x1E: return ASL<_abx>() ; case 0x20: return JSR() ;
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case 0x21: return AND<izx>() ; case 0x24: return BIT<zp>() ;
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case 0x25: return AND<zp>() ; case 0x26: return ROL<zp>() ;
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case 0x28: return PLP() ; case 0x29: return AND<imm>() ;
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case 0x2A: return ROL_A() ; case 0x2C: return BIT<abs>() ;
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case 0x2D: return AND<abs>() ; case 0x2E: return ROL<abs>() ;
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case 0x30: return br<N,1>() ; case 0x31: return AND<izy>() ;
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case 0x35: return AND<zpx>() ; case 0x36: return ROL<zpx>() ;
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case 0x38: return flag<C,1>() ; case 0x39: return AND<aby>() ;
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case 0x3D: return AND<abx>() ; case 0x3E: return ROL<_abx>() ;
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case 0x40: return RTI() ; case 0x41: return EOR<izx>() ;
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case 0x45: return EOR<zp>() ; case 0x46: return LSR<zp>() ;
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case 0x48: return PHA() ; case 0x49: return EOR<imm>() ;
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case 0x4A: return LSR_A() ; case 0x4C: return JMP() ;
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case 0x4D: return EOR<abs>() ; case 0x4E: return LSR<abs>() ;
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case 0x50: return br<V,0>() ; case 0x51: return EOR<izy>() ;
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case 0x55: return EOR<zpx>() ; case 0x56: return LSR<zpx>() ;
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case 0x58: return flag<I,0>() ; case 0x59: return EOR<aby>() ;
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case 0x5D: return EOR<abx>() ; case 0x5E: return LSR<_abx>() ;
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case 0x60: return RTS() ; case 0x61: return ADC<izx>() ;
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case 0x65: return ADC<zp>() ; case 0x66: return ROR<zp>() ;
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case 0x68: return PLA() ; case 0x69: return ADC<imm>() ;
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case 0x6A: return ROR_A() ; case 0x6C: return JMP_IND() ;
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case 0x6D: return ADC<abs>() ; case 0x6E: return ROR<abs>() ;
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case 0x70: return br<V,1>() ; case 0x71: return ADC<izy>() ;
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case 0x75: return ADC<zpx>() ; case 0x76: return ROR<zpx>() ;
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case 0x78: return flag<I,1>() ; case 0x79: return ADC<aby>() ;
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case 0x7D: return ADC<abx>() ; case 0x7E: return ROR<_abx>() ;
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case 0x81: return st<A,izx>() ; case 0x84: return st<Y,zp>() ;
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case 0x85: return st<A,zp>() ; case 0x86: return st<X,zp>() ;
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case 0x88: return dec<Y>() ; case 0x8A: return tr<X,A>() ;
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case 0x8C: return st<Y,abs>() ; case 0x8D: return st<A,abs>() ;
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case 0x8E: return st<X,abs>() ; case 0x90: return br<C,0>() ;
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case 0x91: return st<A,izy>() ; case 0x94: return st<Y,zpx>() ;
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case 0x95: return st<A,zpx>() ; case 0x96: return st<X,zpy>() ;
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case 0x98: return tr<Y,A>() ; case 0x99: return st<A,aby>() ;
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case 0x9A: return tr<X,S>() ; case 0x9D: return st<A,abx>() ;
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case 0xA0: return ld<Y,imm>() ; case 0xA1: return ld<A,izx>() ;
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case 0xA2: return ld<X,imm>() ; case 0xA4: return ld<Y,zp>() ;
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case 0xA5: return ld<A,zp>() ; case 0xA6: return ld<X,zp>() ;
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case 0xA8: return tr<A,Y>() ; case 0xA9: return ld<A,imm>() ;
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case 0xAA: return tr<A,X>() ; case 0xAC: return ld<Y,abs>() ;
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case 0xAD: return ld<A,abs>() ; case 0xAE: return ld<X,abs>() ;
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case 0xB0: return br<C,1>() ; case 0xB1: return ld<A,izy>() ;
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case 0xB4: return ld<Y,zpx>() ; case 0xB5: return ld<A,zpx>() ;
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case 0xB6: return ld<X,zpy>() ; case 0xB8: return flag<V,0>() ;
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case 0xB9: return ld<A,aby>() ; case 0xBA: return tr<S,X>() ;
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case 0xBC: return ld<Y,abx>() ; case 0xBD: return ld<A,abx>() ;
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case 0xBE: return ld<X,aby>() ; case 0xC0: return cmp<Y,imm>();
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case 0xC1: return cmp<A,izx>(); case 0xC4: return cmp<Y,zp>() ;
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case 0xC5: return cmp<A,zp>() ; case 0xC6: return DEC<zp>() ;
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case 0xC8: return inc<Y>() ; case 0xC9: return cmp<A,imm>();
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case 0xCA: return dec<X>() ; case 0xCC: return cmp<Y,abs>();
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case 0xCD: return cmp<A,abs>(); case 0xCE: return DEC<abs>() ;
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case 0xD0: return br<Z,0>() ; case 0xD1: return cmp<A,izy>();
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case 0xD5: return cmp<A,zpx>(); case 0xD6: return DEC<zpx>() ;
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case 0xD8: return flag<D,0>() ; case 0xD9: return cmp<A,aby>();
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case 0xDD: return cmp<A,abx>(); case 0xDE: return DEC<_abx>() ;
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case 0xE0: return cmp<X,imm>(); case 0xE1: return SBC<izx>() ;
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case 0xE4: return cmp<X,zp>() ; case 0xE5: return SBC<zp>() ;
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case 0xE6: return INC<zp>() ; case 0xE8: return inc<X>() ;
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case 0xE9: return SBC<imm>() ; case 0xEA: return NOP() ;
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case 0xEC: return cmp<X,abs>(); case 0xED: return SBC<abs>() ;
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case 0xEE: return INC<abs>() ; case 0xF0: return br<Z,1>() ;
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case 0xF1: return SBC<izy>() ; case 0xF5: return SBC<zpx>() ;
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case 0xF6: return INC<zpx>() ; case 0xF8: return flag<D,1>() ;
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case 0xF9: return SBC<aby>() ; case 0xFD: return SBC<abx>() ;
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case 0xFE: return INC<_abx>() ; default: return exit(1) ;
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}
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}
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void reset()
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{
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A = X = Y = 0x00;
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P.reg = 0b00100100;
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PC = 0xC000;
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S = 0xFD;
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}
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int main(int argc, char const *argv[])
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{
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reset();
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FILE* f = fopen(argv[1], "rb");
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fseek(f, 0, SEEK_END);
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int s = ftell(f);
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fseek(f, 16, SEEK_SET);
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fread(mem + 0xC000, 0x4000, 1, f);
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u64 old_clock = 0;
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while(1)
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{
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printf("[PC: $%.4x] - | A: $%.2x | X: $%.2x | Y: $%.2x | P: $%.2x | S: $%.2x | CYC: %lu\n", PC, A, X, Y, P.reg, S, (clock - old_clock) * 3);
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fflush(stdout);
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old_clock = clock;
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step();
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}
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return 0;
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}
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30
src/cpu.hpp
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src/cpu.hpp
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#include "types.hpp"
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#ifndef CPU_HPP
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#define CPU_HPP
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enum {C, Z, I, D, B, UNUSED, V, N};
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union Flags
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{
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struct
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{
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bool c : 1;
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bool z : 1;
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bool i : 1;
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bool d : 1;
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bool b : 1;
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bool unused : 1;
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bool v : 1;
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bool n : 1;
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};
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u8 reg;
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bool get(u8 i) { return reg & (1 << i); }
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void set(u8 i, bool v) { reg = v ? (reg | (1 << i)) : (reg & ~(1 << i)); }
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};
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typedef u16 (*Mode)(void);
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#endif
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13
src/types.hpp
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src/types.hpp
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#include <cstdint>
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#ifndef TYPES_HPP
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#define TYPES_HPP
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typedef uint8_t u8; typedef int8_t s8;
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typedef uint16_t u16; typedef int16_t s16;
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typedef uint32_t u32; typedef int32_t s32;
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typedef uint64_t u64; typedef int64_t s64;
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#endif
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